Keep vanetza-idf in obu-firmware, so a plain clone builds the firmware
obu-firmware builds against the vanetza-idf C-ITS library, which until now came from the colleague's microbu-esp32c5 tree beside the repository and was not tracked here, so a clone of this repository could not build the firmware it ships. The library alone is now part of obu-firmware, as obu-firmware/external/vanetza-idf: their external/vanetza-idf at commit cf4b99f, unchanged (9775 files; see its PROVENANCE.md). CMake takes it from there by default; -DVANETZA_IDF_DIR still points the build elsewhere. The rest of the colleague's tree (their own VAM firmware, PKI tooling, station-link Python tools, the V2X2MAP bridge) stays out of this repository and gitignored; nothing is pushed to their repository. NOTES.md, docs/06, TODO.md and the pcap verifier's usage line point at the new location.
This commit is contained in:
Ashin Walpola
+13
@@ -0,0 +1,13 @@
|
||||
-- test_trust_domain_and_pool (free heap 112192, largest block 81920)
|
||||
-- test_signing_profiles (free heap 111884, largest block 81920)
|
||||
-- test_fail_closed (free heap 111884, largest block 81920)
|
||||
-- test_fail_closed: unknown issuer (free heap 111884, largest block 81920)
|
||||
-- test_fail_closed: expired ticket (free heap 111884, largest block 81920)
|
||||
-- test_fail_closed: SN-DECAP (free heap 111884, largest block 81920)
|
||||
-- test_identifier_change (free heap 111884, largest block 81920)
|
||||
-- test_gn_core_identifier_change (free heap 111884, largest block 81920)
|
||||
-- test_sf_facilities_hook (free heap 111884, largest block 81920)
|
||||
-- test_ecies (free heap 111292, largest block 81920)
|
||||
-- test_enrolment_and_authorization (free heap 111292, largest block 81920)
|
||||
PASS: 503 checks (host/component tests, not ETSI ATS verdicts)
|
||||
VIDF_TEST_RESULT=0
|
||||
+60
@@ -0,0 +1,60 @@
|
||||
Open On-Chip Debugger v0.12.0-esp32-20260424 (2026-04-24-15:13)
|
||||
Licensed under GNU GPL v2
|
||||
For bug reports, read
|
||||
http://openocd.org/doc/doxygen/bugs.html
|
||||
Info : esp_usb_jtag: VID set to 0x303a and PID to 0x1001
|
||||
Info : esp_usb_jtag: capabilities descriptor set to 0x2000
|
||||
Info : esp_usb_jtag: serial (10:BD:A3:CC:01:94)
|
||||
Info : esp_usb_jtag: Device found. Base speed 24000KHz, div range 1 to 255
|
||||
Info : clock speed 24000 kHz
|
||||
Info : JTAG tap: esp32c5.tap0 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0)
|
||||
Info : JTAG tap: esp32c5.tap1 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0)
|
||||
Info : [esp32c5] datacount=1 progbufsize=2
|
||||
Info : [esp32c5] Examined RISC-V core
|
||||
Info : [esp32c5] XLEN=32, misa=0x40103105
|
||||
Warn : [esp32c5] Failed to read memory via program buffer.
|
||||
Info : [esp32c5] Chip revision v1.0
|
||||
Info : [esp32c5] Examination succeed
|
||||
Info : [esp32c5] starting gdb server on 3333
|
||||
Info : Listening on port 3333 for gdb connections
|
||||
Info : [esp32c5] Target halted, PC=0x40807752, debug_reason=00000000
|
||||
** program_esp input args <0x2000 verify> **
|
||||
Info : JTAG tap: esp32c5.tap0 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0)
|
||||
Info : JTAG tap: esp32c5.tap1 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0)
|
||||
Info : [esp32c5] Register fp is dirty!
|
||||
Info : [esp32c5] Register s1 is dirty!
|
||||
Info : [esp32c5] Discarding values of dirty registers.
|
||||
Info : [esp32c5] Reset cause (24) - (JTAG CPU reset)
|
||||
** Programming Started **
|
||||
Info : Flash mapping 0: 0x10020 -> 0x42140020, 518 KB
|
||||
Info : Flash mapping 1: 0xa0020 -> 0x42000020, 1226 KB
|
||||
Info : Auto-detected flash bank 'esp32c5.flash' size 8192 KB
|
||||
Info : Using flash bank 'esp32c5.flash' size 8192 KB
|
||||
** Verifying existing flash content **
|
||||
** Existing flash content matches **
|
||||
** program_esp input args <0x8000 verify> **
|
||||
Magic byte 0xe9 not found, skipping image revision check
|
||||
Info : JTAG tap: esp32c5.tap0 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0)
|
||||
Info : JTAG tap: esp32c5.tap1 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0)
|
||||
Info : [esp32c5] Reset cause (24) - (JTAG CPU reset)
|
||||
** Programming Started **
|
||||
** Verifying existing flash content **
|
||||
** Existing flash content matches **
|
||||
** program_esp input args <0x10000 verify> **
|
||||
Info : JTAG tap: esp32c5.tap0 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0)
|
||||
Info : JTAG tap: esp32c5.tap1 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0)
|
||||
Info : [esp32c5] Reset cause (24) - (JTAG CPU reset)
|
||||
** Programming Started **
|
||||
** Verifying existing flash content **
|
||||
** Existing flash content mismatched. Reprogramming the flash **
|
||||
Info : PROF: Erased 2031616 bytes in 6127.58 ms
|
||||
Info : PROF: Data transferred in 19230.7 ms @ 103.168 KB/s
|
||||
Info : PROF: Wrote 2031616 bytes in 19516.5 ms (data transfer time included)
|
||||
** Programming Finished in 26620 ms **
|
||||
** Verify Started **
|
||||
Info : PROF: Flash verified in 810.582 ms
|
||||
** Verify OK **
|
||||
Info : JTAG tap: esp32c5.tap0 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0)
|
||||
Info : JTAG tap: esp32c5.tap1 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0)
|
||||
Info : [esp32c5] Reset cause (24) - (JTAG CPU reset)
|
||||
shutdown command invoked
|
||||
+18
@@ -0,0 +1,18 @@
|
||||
{
|
||||
"kind": "component-tests",
|
||||
"target": "esp32c5",
|
||||
"idf_version": "6.0.2",
|
||||
"port": "COM20",
|
||||
"status": "pass",
|
||||
"reset": "none",
|
||||
"checks": 503,
|
||||
"backend": "BackendMbedTls (PSA Crypto, mbedTLS 4.1.0 of ESP-IDF 6.0.2); same image as security-device-03 (COM11)",
|
||||
"capture": "listen-only after the OpenOCD 'reset run'; the boot banner precedes the first retained line",
|
||||
"recovery": "This board (USB serial 10:BD:A3:CC:01:94) was left unflashable by the security-device-02 run (esptool 'Write timeout' after every USB warm reset, including after a power cycle, because the old image's failed test run never applied the ROM UART0 clock repair). Programmed over JTAG with OpenOCD (openocd-flash.log): halt, set PCR_UART0_SCLK_EN (mmw 0x60096004 0x400000 0) before each program_esp step, bootloader and partition table already matched, application reprogrammed and verified. After this run, a plain esptool write-flash with --before default-reset succeeded again (the app_main repair holds).",
|
||||
"sha256": {
|
||||
"application": "5fd4602978f12bf18ad9a19e88836ff066450a0359092efb4b865192b9632eb5",
|
||||
"bootloader": "93903cefa2bae3f5805a604ae744fabfdea78a866a1230ec3cc129190b93fe40",
|
||||
"partition_table": "73c0b5c3e5fcba3a151cc70c453c93dd5f4798899e7f2f8cca76da1f32ffc501",
|
||||
"sdkconfig": "caa03c6c8556d56b8ac848bc142ce68331b4a9cae3081590d4c7111338bc60a6"
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user