Ashin Walpola
d107534eb2
obu-firmware builds against the vanetza-idf C-ITS library, which until now came from the colleague's microbu-esp32c5 tree beside the repository and was not tracked here, so a clone of this repository could not build the firmware it ships. The library alone is now part of obu-firmware, as obu-firmware/external/vanetza-idf: their external/vanetza-idf at commit cf4b99f, unchanged (9775 files; see its PROVENANCE.md). CMake takes it from there by default; -DVANETZA_IDF_DIR still points the build elsewhere. The rest of the colleague's tree (their own VAM firmware, PKI tooling, station-link Python tools, the V2X2MAP bridge) stays out of this repository and gitignored; nothing is pushed to their repository. NOTES.md, docs/06, TODO.md and the pcap verifier's usage line point at the new location.
498 lines
16 KiB
C
498 lines
16 KiB
C
/*
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* Generated by asn1c
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* From ASN.1 module "DSRC"
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* found in "ISO19091.asn"
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* `asn1c -fcompound-names -fincludes-quoted -no-gen-example -R`
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*/
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#include "ComputedLane.h"
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static int
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memb_regional_constraint_1(const asn_TYPE_descriptor_t *td, const void *sptr,
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asn_app_constraint_failed_f *ctfailcb, void *app_key) {
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size_t size;
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if(!sptr) {
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ASN__CTFAIL(app_key, td, sptr,
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"%s: value not given (%s:%d)",
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td->name, __FILE__, __LINE__);
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return -1;
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}
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/* Determine the number of elements */
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size = _A_CSEQUENCE_FROM_VOID(sptr)->count;
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if((size >= 1UL && size <= 4UL)) {
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/* Perform validation of the inner elements */
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return SEQUENCE_OF_constraint(td, sptr, ctfailcb, app_key);
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} else {
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ASN__CTFAIL(app_key, td, sptr,
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"%s: constraint failed (%s:%d)",
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td->name, __FILE__, __LINE__);
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return -1;
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}
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}
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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static asn_oer_constraints_t asn_OER_type_offsetXaxis_constr_3 CC_NOTUSED = {
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{ 0, 0 },
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-1};
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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static asn_per_constraints_t asn_PER_type_offsetXaxis_constr_3 CC_NOTUSED = {
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{ APC_CONSTRAINED, 1, 1, 0, 1 } /* (0..1) */,
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{ APC_UNCONSTRAINED, -1, -1, 0, 0 },
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0, 0 /* No PER value map */
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};
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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static asn_oer_constraints_t asn_OER_type_offsetYaxis_constr_6 CC_NOTUSED = {
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{ 0, 0 },
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-1};
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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static asn_per_constraints_t asn_PER_type_offsetYaxis_constr_6 CC_NOTUSED = {
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{ APC_CONSTRAINED, 1, 1, 0, 1 } /* (0..1) */,
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{ APC_UNCONSTRAINED, -1, -1, 0, 0 },
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0, 0 /* No PER value map */
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};
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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static asn_oer_constraints_t asn_OER_type_regional_constr_12 CC_NOTUSED = {
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{ 0, 0 },
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-1 /* (SIZE(1..4)) */};
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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static asn_per_constraints_t asn_PER_type_regional_constr_12 CC_NOTUSED = {
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{ APC_UNCONSTRAINED, -1, -1, 0, 0 },
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{ APC_CONSTRAINED, 2, 2, 1, 4 } /* (SIZE(1..4)) */,
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0, 0 /* No PER value map */
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};
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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static asn_oer_constraints_t asn_OER_memb_regional_constr_12 CC_NOTUSED = {
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{ 0, 0 },
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-1 /* (SIZE(1..4)) */};
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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static asn_per_constraints_t asn_PER_memb_regional_constr_12 CC_NOTUSED = {
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{ APC_UNCONSTRAINED, -1, -1, 0, 0 },
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{ APC_CONSTRAINED, 2, 2, 1, 4 } /* (SIZE(1..4)) */,
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0, 0 /* No PER value map */
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};
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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static asn_TYPE_member_t asn_MBR_offsetXaxis_3[] = {
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{ ATF_NOFLAGS, 0, offsetof(struct ComputedLane__offsetXaxis, choice.small),
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(ASN_TAG_CLASS_CONTEXT | (0 << 2)),
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-1, /* IMPLICIT tag at current level */
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&asn_DEF_DrivenLineOffsetSm,
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0,
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{
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_JER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
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0
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},
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0, 0, /* No default value */
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"small"
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},
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{ ATF_NOFLAGS, 0, offsetof(struct ComputedLane__offsetXaxis, choice.large),
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(ASN_TAG_CLASS_CONTEXT | (1 << 2)),
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-1, /* IMPLICIT tag at current level */
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&asn_DEF_DrivenLineOffsetLg,
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0,
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{
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_JER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
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0
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},
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0, 0, /* No default value */
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"large"
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},
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};
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static const asn_TYPE_tag2member_t asn_MAP_offsetXaxis_tag2el_3[] = {
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{ (ASN_TAG_CLASS_CONTEXT | (0 << 2)), 0, 0, 0 }, /* small */
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{ (ASN_TAG_CLASS_CONTEXT | (1 << 2)), 1, 0, 0 } /* large */
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};
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static asn_CHOICE_specifics_t asn_SPC_offsetXaxis_specs_3 = {
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sizeof(struct ComputedLane__offsetXaxis),
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offsetof(struct ComputedLane__offsetXaxis, _asn_ctx),
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offsetof(struct ComputedLane__offsetXaxis, present),
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sizeof(((struct ComputedLane__offsetXaxis *)0)->present),
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asn_MAP_offsetXaxis_tag2el_3,
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2, /* Count of tags in the map */
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0, 0,
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-1 /* Extensions start */
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};
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static /* Use -fall-defs-global to expose */
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asn_TYPE_descriptor_t asn_DEF_offsetXaxis_3 = {
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"offsetXaxis",
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"offsetXaxis",
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&asn_OP_CHOICE,
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0, /* No effective tags (pointer) */
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0, /* No effective tags (count) */
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0, /* No tags (pointer) */
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0, /* No tags (count) */
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{
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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&asn_OER_type_offsetXaxis_constr_3,
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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&asn_PER_type_offsetXaxis_constr_3,
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_JER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
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CHOICE_constraint
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},
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asn_MBR_offsetXaxis_3,
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2, /* Elements count */
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&asn_SPC_offsetXaxis_specs_3 /* Additional specs */
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};
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static asn_TYPE_member_t asn_MBR_offsetYaxis_6[] = {
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{ ATF_NOFLAGS, 0, offsetof(struct ComputedLane__offsetYaxis, choice.small),
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(ASN_TAG_CLASS_CONTEXT | (0 << 2)),
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-1, /* IMPLICIT tag at current level */
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&asn_DEF_DrivenLineOffsetSm,
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0,
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{
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_JER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
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0
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},
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0, 0, /* No default value */
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"small"
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},
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{ ATF_NOFLAGS, 0, offsetof(struct ComputedLane__offsetYaxis, choice.large),
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(ASN_TAG_CLASS_CONTEXT | (1 << 2)),
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-1, /* IMPLICIT tag at current level */
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&asn_DEF_DrivenLineOffsetLg,
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0,
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{
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_JER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
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0
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},
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0, 0, /* No default value */
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"large"
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},
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};
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static const asn_TYPE_tag2member_t asn_MAP_offsetYaxis_tag2el_6[] = {
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{ (ASN_TAG_CLASS_CONTEXT | (0 << 2)), 0, 0, 0 }, /* small */
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{ (ASN_TAG_CLASS_CONTEXT | (1 << 2)), 1, 0, 0 } /* large */
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};
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static asn_CHOICE_specifics_t asn_SPC_offsetYaxis_specs_6 = {
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sizeof(struct ComputedLane__offsetYaxis),
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offsetof(struct ComputedLane__offsetYaxis, _asn_ctx),
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offsetof(struct ComputedLane__offsetYaxis, present),
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sizeof(((struct ComputedLane__offsetYaxis *)0)->present),
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asn_MAP_offsetYaxis_tag2el_6,
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2, /* Count of tags in the map */
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0, 0,
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-1 /* Extensions start */
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};
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static /* Use -fall-defs-global to expose */
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asn_TYPE_descriptor_t asn_DEF_offsetYaxis_6 = {
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"offsetYaxis",
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"offsetYaxis",
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&asn_OP_CHOICE,
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0, /* No effective tags (pointer) */
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0, /* No effective tags (count) */
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0, /* No tags (pointer) */
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0, /* No tags (count) */
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{
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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&asn_OER_type_offsetYaxis_constr_6,
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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&asn_PER_type_offsetYaxis_constr_6,
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_JER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
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CHOICE_constraint
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},
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asn_MBR_offsetYaxis_6,
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2, /* Elements count */
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&asn_SPC_offsetYaxis_specs_6 /* Additional specs */
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};
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static asn_TYPE_member_t asn_MBR_regional_12[] = {
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{ ATF_POINTER, 0, 0,
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(ASN_TAG_CLASS_UNIVERSAL | (16 << 2)),
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0,
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&asn_DEF_Reg_ComputedLane,
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0,
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{
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_JER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
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0
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},
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0, 0, /* No default value */
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""
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},
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};
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static const ber_tlv_tag_t asn_DEF_regional_tags_12[] = {
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(ASN_TAG_CLASS_CONTEXT | (6 << 2)),
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(ASN_TAG_CLASS_UNIVERSAL | (16 << 2))
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};
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static asn_SET_OF_specifics_t asn_SPC_regional_specs_12 = {
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sizeof(struct ComputedLane__regional),
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offsetof(struct ComputedLane__regional, _asn_ctx),
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0, /* XER encoding is XMLDelimitedItemList */
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};
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static /* Use -fall-defs-global to expose */
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asn_TYPE_descriptor_t asn_DEF_regional_12 = {
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"regional",
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"regional",
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&asn_OP_SEQUENCE_OF,
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asn_DEF_regional_tags_12,
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sizeof(asn_DEF_regional_tags_12)
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/sizeof(asn_DEF_regional_tags_12[0]) - 1, /* 1 */
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asn_DEF_regional_tags_12, /* Same as above */
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sizeof(asn_DEF_regional_tags_12)
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/sizeof(asn_DEF_regional_tags_12[0]), /* 2 */
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{
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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&asn_OER_type_regional_constr_12,
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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&asn_PER_type_regional_constr_12,
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_JER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
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SEQUENCE_OF_constraint
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},
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asn_MBR_regional_12,
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1, /* Single element */
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&asn_SPC_regional_specs_12 /* Additional specs */
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};
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asn_TYPE_member_t asn_MBR_ComputedLane_1[] = {
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{ ATF_NOFLAGS, 0, offsetof(struct ComputedLane, referenceLaneId),
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(ASN_TAG_CLASS_CONTEXT | (0 << 2)),
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-1, /* IMPLICIT tag at current level */
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&asn_DEF_LaneID,
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0,
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{
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_JER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
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0
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},
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0, 0, /* No default value */
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"referenceLaneId"
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},
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{ ATF_NOFLAGS, 0, offsetof(struct ComputedLane, offsetXaxis),
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(ASN_TAG_CLASS_CONTEXT | (1 << 2)),
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+1, /* EXPLICIT tag at current level */
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&asn_DEF_offsetXaxis_3,
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0,
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{
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_JER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
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0
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},
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0, 0, /* No default value */
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"offsetXaxis"
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},
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{ ATF_NOFLAGS, 0, offsetof(struct ComputedLane, offsetYaxis),
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(ASN_TAG_CLASS_CONTEXT | (2 << 2)),
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+1, /* EXPLICIT tag at current level */
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&asn_DEF_offsetYaxis_6,
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0,
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{
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_JER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
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0
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},
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0, 0, /* No default value */
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"offsetYaxis"
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},
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{ ATF_POINTER, 4, offsetof(struct ComputedLane, rotateXY),
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(ASN_TAG_CLASS_CONTEXT | (3 << 2)),
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-1, /* IMPLICIT tag at current level */
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&asn_DEF_Angle,
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0,
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{
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#if !defined(ASN_DISABLE_OER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
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#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
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#if !defined(ASN_DISABLE_JER_SUPPORT)
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0,
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#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
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0
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},
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0, 0, /* No default value */
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"rotateXY"
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},
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{ ATF_POINTER, 3, offsetof(struct ComputedLane, scaleXaxis),
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(ASN_TAG_CLASS_CONTEXT | (4 << 2)),
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-1, /* IMPLICIT tag at current level */
|
|
&asn_DEF_Scale_B12,
|
|
0,
|
|
{
|
|
#if !defined(ASN_DISABLE_OER_SUPPORT)
|
|
0,
|
|
#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
|
|
#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
|
|
0,
|
|
#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
|
|
#if !defined(ASN_DISABLE_JER_SUPPORT)
|
|
0,
|
|
#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
|
|
0
|
|
},
|
|
0, 0, /* No default value */
|
|
"scaleXaxis"
|
|
},
|
|
{ ATF_POINTER, 2, offsetof(struct ComputedLane, scaleYaxis),
|
|
(ASN_TAG_CLASS_CONTEXT | (5 << 2)),
|
|
-1, /* IMPLICIT tag at current level */
|
|
&asn_DEF_Scale_B12,
|
|
0,
|
|
{
|
|
#if !defined(ASN_DISABLE_OER_SUPPORT)
|
|
0,
|
|
#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
|
|
#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
|
|
0,
|
|
#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
|
|
#if !defined(ASN_DISABLE_JER_SUPPORT)
|
|
0,
|
|
#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
|
|
0
|
|
},
|
|
0, 0, /* No default value */
|
|
"scaleYaxis"
|
|
},
|
|
{ ATF_POINTER, 1, offsetof(struct ComputedLane, regional),
|
|
(ASN_TAG_CLASS_CONTEXT | (6 << 2)),
|
|
0,
|
|
&asn_DEF_regional_12,
|
|
0,
|
|
{
|
|
#if !defined(ASN_DISABLE_OER_SUPPORT)
|
|
&asn_OER_memb_regional_constr_12,
|
|
#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
|
|
#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
|
|
&asn_PER_memb_regional_constr_12,
|
|
#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
|
|
#if !defined(ASN_DISABLE_JER_SUPPORT)
|
|
0,
|
|
#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
|
|
memb_regional_constraint_1
|
|
},
|
|
0, 0, /* No default value */
|
|
"regional"
|
|
},
|
|
};
|
|
static const int asn_MAP_ComputedLane_oms_1[] = { 3, 4, 5, 6 };
|
|
static const ber_tlv_tag_t asn_DEF_ComputedLane_tags_1[] = {
|
|
(ASN_TAG_CLASS_UNIVERSAL | (16 << 2))
|
|
};
|
|
static const asn_TYPE_tag2member_t asn_MAP_ComputedLane_tag2el_1[] = {
|
|
{ (ASN_TAG_CLASS_CONTEXT | (0 << 2)), 0, 0, 0 }, /* referenceLaneId */
|
|
{ (ASN_TAG_CLASS_CONTEXT | (1 << 2)), 1, 0, 0 }, /* offsetXaxis */
|
|
{ (ASN_TAG_CLASS_CONTEXT | (2 << 2)), 2, 0, 0 }, /* offsetYaxis */
|
|
{ (ASN_TAG_CLASS_CONTEXT | (3 << 2)), 3, 0, 0 }, /* rotateXY */
|
|
{ (ASN_TAG_CLASS_CONTEXT | (4 << 2)), 4, 0, 0 }, /* scaleXaxis */
|
|
{ (ASN_TAG_CLASS_CONTEXT | (5 << 2)), 5, 0, 0 }, /* scaleYaxis */
|
|
{ (ASN_TAG_CLASS_CONTEXT | (6 << 2)), 6, 0, 0 } /* regional */
|
|
};
|
|
asn_SEQUENCE_specifics_t asn_SPC_ComputedLane_specs_1 = {
|
|
sizeof(struct ComputedLane),
|
|
offsetof(struct ComputedLane, _asn_ctx),
|
|
asn_MAP_ComputedLane_tag2el_1,
|
|
7, /* Count of tags in the map */
|
|
asn_MAP_ComputedLane_oms_1, /* Optional members */
|
|
4, 0, /* Root/Additions */
|
|
7, /* First extension addition */
|
|
};
|
|
asn_TYPE_descriptor_t asn_DEF_ComputedLane = {
|
|
"ComputedLane",
|
|
"ComputedLane",
|
|
&asn_OP_SEQUENCE,
|
|
asn_DEF_ComputedLane_tags_1,
|
|
sizeof(asn_DEF_ComputedLane_tags_1)
|
|
/sizeof(asn_DEF_ComputedLane_tags_1[0]), /* 1 */
|
|
asn_DEF_ComputedLane_tags_1, /* Same as above */
|
|
sizeof(asn_DEF_ComputedLane_tags_1)
|
|
/sizeof(asn_DEF_ComputedLane_tags_1[0]), /* 1 */
|
|
{
|
|
#if !defined(ASN_DISABLE_OER_SUPPORT)
|
|
0,
|
|
#endif /* !defined(ASN_DISABLE_OER_SUPPORT) */
|
|
#if !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT)
|
|
0,
|
|
#endif /* !defined(ASN_DISABLE_UPER_SUPPORT) || !defined(ASN_DISABLE_APER_SUPPORT) */
|
|
#if !defined(ASN_DISABLE_JER_SUPPORT)
|
|
0,
|
|
#endif /* !defined(ASN_DISABLE_JER_SUPPORT) */
|
|
SEQUENCE_constraint
|
|
},
|
|
asn_MBR_ComputedLane_1,
|
|
7, /* Elements count */
|
|
&asn_SPC_ComputedLane_specs_1 /* Additional specs */
|
|
};
|
|
|